xdc
Production-grade FPGA timing constraint library for Xilinx UltraScale+. Modular, parametric XDC templates for high-speed digital design.
A Cadence Allegro PCB schematics parser and verification tool. Together with IBERTpy can configure, run, and compile Vivado IBERT eye diagrams using information from Cadence Allegro schematics.
xdc.py is a Python library for interacting with XDC (XinFin Digital Contract) tokens using web3.py