Vivado Python Packages

edalize

An abstraction library for interfacing EDA tools

rapidwright

Build Customized FPGA Implementations for Vivado

tsfpga

A flexible and scalable development platform for modern FPGA projects.

vivado-mcp

Vivado MCP server — 让 Claude Code / Cursor / Codex 驱动本地 FPGA 全流程。30 个精选工具、8 个证据驱动 Prompt、doctor 环境自检、GUI/Tcl/attach 会话，以及时序和 CRITICAL WARNING 中文诊断。

simplhdl

Simulation and implementation flow for hardware description languages

cocotb-vivado

Limited python / cocotb interface to Xilinx/AMD Vivado simulator.

dau-build

Build tools for dau projects

svreal

Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats

pyedaa-toolsetup

EDA tool detection, configuration and selection layer.

pyfpga

A Python package to use FPGA development tools programmatically.

xilinx-test-runner

Test runner for FPGA verification: build the bitstream, keep the variants, run tests on the board, compare against the baseline. Console, terminal and Qt interfaces. Python, no required dependencies.

crczero

Generates synthesizable VHDL & Verilog, parallel CRC modules from a built-in catalog of 80+ named algorithms, or from user-supplied polynomial parameters. Optional AXI4-S wrappers, Self-checking testbenches with VCD waveform output are included. Hardware tested.

pcbpy

A Cadence Allegro PCB schematics parser and verification tool. Together with IBERTpy can configure, run, and compile Vivado IBERT eye diagrams using information from Cadence Allegro schematics.