PyRank

System Verilog Python Packages

Python packages with the GitHub topic system-verilog. Sorted by relevance, with stars and monthly downloads.
edaa-org
pysvmodel

An abstract language model of SystemVerilog (incl. Verilog) written in Python.

1K 9 0
esynr3z
corsair

Control and Status Register map generator for FPGA/ASIC projects

1K 137 40