Riscv Python Packages

unicorn

Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, PowerPC, RiscV, S390x, TriCore, X86)

ncnn

ncnn is a high-performance neural network inference framework optimized for the mobile platform

pnnx

ncnn is a high-performance neural network inference framework optimized for the mobile platform

vpod

Lightweight, secure Linux sandboxes for untrusted processes. Runs in the browser and on the server.

coreblocks

RISC-V out-of-order core for education and research purposes

tinyfive

TinyFive is a lightweight RISC-V emulator and assembler written in Python with neural network examples

microprobe-core

Microprobe: Microbenchmark generation framework

rvnewop

A RISC-V new instruction discovery tool [Work in Progress]

microprobe-target-riscv

Microprobe: Microbenchmark generation framework

microprobe-all

Microprobe: Microbenchmark generation framework

riscv-assembler

RISC-V Assembly code assembler package for Python.

microprobe-doc

Microprobe: Microbenchmark generation framework

udbserver

Unicorn Emulator Debug Server - Written in Rust, with bindings for C, Go, Java and Python

microprobe-target-power

Microprobe: Microbenchmark generation framework

seal5

Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization

fast-audio-resampler

Audio resampling focused on x86/x86_64, AArch64 ARM, and RISC-V CPUs

shl-python

An optimized neural network operator library for chips base on Xuantie CPU.

rvgen

Pure-Python RISC-V instruction generator with built-in functional coverage, auto-regression, and CI-ready dashboards.