Registers Python Packages

systemrdl-compiler

SystemRDL 2.0 language compiler front-end

peakrdl-html

Generate address space documentation HTML from compiled SystemRDL input

peakrdl-regblock

Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

peakrdl

Control and status register code generator toolchain

peakrdl-uvm

Generate UVM register model from compiled SystemRDL input

peakrdl-cli

Control and status register code generator toolchain

openregister

Publishing tools for GOV.UK style registers

regfile-generics

Python abstraction layer for registerfile access

peakrdl-check

Semantic compatibility analysis and configurable quality gates for SystemRDL specifications. Detects firmware-breaking register changes, produces CI reports and provides scalable exploration of large register maps.

regdrift

Compatibility gate for CMSIS-SVD register maps. Detect breaking register-map changes in CI before they reach firmware.

ralbot-uvm

Generate UVM register model from compiled SystemRDL input

smeagle

Smeagle Python - generate facts from ELF with debug