Hdl Python Packages

cocotb-bus

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

cocotb-coverage

Functional Coverage and Constrained Randomization Extensions for Cocotb

amaranth

A modern hardware definition language and toolchain based on Python

pyrtl

A collection of classes providing simple hardware specification, simulation, tracing, and testing suitable for teaching and research. Simplicity, usability, clarity, and extensibility are the overarching goals, rather than performance or optimization.

astli

SystemVerilog language tooling, written in Rust

transactron

Hardware transactions library for Amaranth

xeda

Cross EDA Abstraction and Automation

neosyn-fpga-mcp

MCP server for FPGA hardware design in C⏚ - agents write a C-like HDL; the server compiles, checks, generates Verilog and synth-checks against the real toolchain.

holoso

Verilog synthesis directly from idiomatic Python for numerical/DSP-heavy applications. Not an HDL.

py4hw

Hardware Design/Visualization/Simulation/RTLGeneration Framework

zkf

Zubax Kulibin Float (ZKF) -- an efficient floating-point engine for controls & embedded following IEEE 754 sans NaN and subnormals

pymtl3

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

hdl-checker

Repurposing existing HDL tools to help writing better code

dau-build

Build tools for dau projects

cg-agent-kit

MCP server for FPGA hardware design in C⏚ - agents write a C-like HDL; the server compiles, checks, generates Verilog and synth-checks against the real toolchain.

pysystemrdlmodel

An abstract language model of SystemRDL written in Python.

pyxhdl

Python Frontend For VHDL And Verilog

hdl-toolkit

Build, validate, package and load Oracle HCM Data Loader (HDL) files from Python or the command line.

sphinx-verilog-domain

Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.

dau-scheduler

Work scheduler for dau projects

sphinxcontrib-hdl-diagrams

Sphinx Extension which generates various types of diagrams from Verilog code.

dau-sim

Cycle-accurate hardware simulator

torii

A Python-based HDL and framework for silicon-based witchcraft

sphinxcontrib-verilog-diagrams

Sphinx Extension which generates various types of diagrams from Verilog code.