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Computer Architecture Python Packages

Python packages with the GitHub topic computer-architecture. Sorted by monthly downloads, with stars and forks.
manunicholasjacob
llama-roofline

Is your llama.cpp decode memory-bandwidth-bound? Find out in one command.

13K 1 0
usamahz
cpu-perf

A reading path for CPU performance engineering, from one instruction to production inference. Primary sources only, with a runnable benchmark for every section.

1K 1K 87
joakimwinum
bytecore

ByteCore: A minimal, 8-bit CPU emulator designed to help developers explore low-level computing concepts.

248 2 0
amaar-mc
bpred

Pure-Python simulator of classical CPU branch predictors: bimodal, gshare, and tournament, with trace-driven accuracy reporting for computer architecture education.

227 0 0
joakimwinum
bytecorecompiler

ByteCoreCompiler: A compiler that transforms ByteCore assembly code into executable memory bytes, seamlessly bridging the gap between high-level assembly instructions and the ByteCore Emulator's low-level functionality.

218 0 0
joakimwinum
bytecorefast

ByteCoreFast: A high-performance, 8-bit CPU emulator, designed as a drop-in replacement for ByteCore, offering enhanced speed while maintaining full compatibility with the original ByteCore interfaces.

191 0 0
MatthewHRockwell
atomik-core

Delta-state algebra — O(1) state reconstruction, 99% bandwidth reduction, formally proven with 92 Lean4 theorems. pip install atomik-core | C99 header | FPGA hardware (69.7 Gops/s)

168 1 0
amaar-mc
scoreboarding

Pure-Python cycle-exact simulator of Thornton's Scoreboarding (CDC 6600) in-order dynamic scheduling, with structural, WAR, and WAW hazard detection and per-instruction traces for computer architecture education.

163 0 0
amaar-mc
tomasulo

Pure-Python simulator of Tomasulo's out-of-order instruction scheduling: reservation stations, common data bus, and register renaming, with cycle-by-cycle traces for computer architecture education.

54 0 0
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